The present invention relates to memory control, and more particularly, to memory control circuits capable of dynamically adjusting deglitch windows, and related methods.
According to the related art, a manufacturer of an electronic device comprising a memory control circuit typically provides a plurality of operation modes for the electronic device, and more particularly, for the memory control circuit. Different operation modes may introduce respective values of power consumption, so various levels of supply voltage drops of the memory control circuit may occur while switching between the operation modes, causing a data strobe signal such as a DQS signal to be very noisy. Regarding this problem, within the memory control circuit, a deglitch window is typically utilized for gating the noisy data strobe signal, before a preamble of the data strobe signal and after a postamble of the data strobe signal.
In a mass production phase of the electronic device, the manufacturer typically needs to determine a fixed delay amount for delaying a deglitch window signal so the deglitch window may be setup, in order to achieve better performance of memory control. When the electronic device is sold to a reseller or an end user, the fixed delay amount will no longer be changed.
However, the phases of the deglitch window signal and/or the DQS signal may fluctuate due to interference from noise or internal/external environmental reasons such as temperature variation or the supply voltage drops mentioned above. Therefore, it is not possible for the electronic device, and more specifically, for the memory control circuit to achieve the best performance of memory control by utilizing the fixed delay amount.